DRAIN CURRENT CHARACTERISTICS OF CARBON-NANOTUBE FET (CNTFET) WITH SiO2, ZrO2 AND HfO2 AS DIELECTRIC MATERIALS USING FETToy CODE

A. Tijjani, G.S.M. Galadanci, G. Babaji

Abstract

Over the last few decades, transistor scaling has taken the centre stage of semiconductor devices. The scaling of metal oxide semiconductor field effect transistor (MOSFET) with 𝑆𝑖𝑂2 thickness has been the driving force towards the technological advancement, but continuous scaling causes a problem of short channel effects, high leakage current, excessive process variation and reliability issues. It is thus, of great necessity to replace the channel material with high mobility materials such as carbon nanotubes FETs to guarantee continued scaling of the device. Carbon Nanotube Field Effect Transistors (CNTFET) are promising Nano-scaled devices for implementing high performance and low power circuits. The Nano device simulator FETtoy was used to assess the electrical characteristics of CNTFETs as channel materials with 𝑆𝑖𝑂2 , Zr𝑂2 , and Hf𝑂2 as dielectric materials. Also, effects on temperature variation were investigated. The output parameters that were studied are: drain current, on current (πΌπ‘œπ‘›), off current (πΌπ‘œπ‘“π‘“), threshold swing (S), drain induced barrier lowering (DIBL), transconductance (π‘”π‘š), output conductance (𝑔𝑑), voltage gain (𝐴𝑣) and carrier injection velocity (𝑣𝑖𝑛𝑗 ). From the results obtained, carbon nanotube as channel material with Hf𝑂2 as dielectric material has higher drain current of 19.3πœ‡π΄, at higher gate voltage of 0.6 volt and operated near quantum capacitance limit. The obtained results were further compared with other established academic paper published of experimental finding under the same category and are in agreement. This apparently indicate that carbon nanotube as channel material with Hf𝑂2 can be used to increase the performance of carbon nanotube field effect transistor at room temperature with 0.88 gate control parameter to suppress the harmful subthreshold conditions when compared with other MOSFET devices. Read full PDF

Keywords: CNTFET, DIBL, FETtoy, SCEs

References

[1] J. Appenzeller, J. Knoch, V. Derycke, R. Martel, S. Wind, and P. Avouris (2002). “Fieldmodulated carrier transport in carbon nanotube transistors,” Physical Review Letters, vol. 89, pp. 126801.1-126801.4

[2] S. Heinze, J. Tersoff, R. Martel, V. Derycke, J. Appenzeller, and P. Avouris, (2002). “Carbon nanotubes as Schottky barrier transistors,” Physical Review Letters, vol. 89, pp. 106801.1-106801.4.

[3] J. Guo, S. Datta, and M. Lundstrom, (2004). “A numerical study of scaling issues for Schottky-Barrier carbon nanotube transistors,” IEEE Transactions on Electron Devices, vol. 51, pp. 172-177.

[4] M. Radosavljevic, S. Heinze, J. Tersoff, and P. Avouris, (2003). “Drain voltage scaling in carbon nanotube transistors,” Applied Physics Letters,” Vol. 83, pp. 2435-2437.

[5] International Technology Road Map for Semiconductors 2.0 (ITRS), (2015) Edition.Retrieve: http://public.itrs.net/ march, 2018

[6] Mitali, S., & Rajesh, M. (2017). Carbon Nanotube FET base high-Performance Universal Logic using Cascade voltage switch logic. 10SR journal of VLSI and signal processing (10SR-JVSP)., 7(5), 40-47.

[7] Rajendra, P.S., Padma, Y.S., & Naga, S.L. (2015). Low leakage CNTFET fill adder. IEEEproceedings of global conference on communication technologies, P 174-179.

[8] Swati, S., & Rajesh, M. (2014). Area and power efficient design of XNOR-XOR logic using 65nm technology. Natural Conference on Syneigetic Trends in Engineering and Technology PP 57-60.

[9] lijima, S & Ichihashi, T. (1993) “Single-Shell Carbon Nanotubes of 1-nm Diameter,” Nature, 363, pp. 603- 605.

[10]Manas, T., Sharma, K.K., Lokendra, S.R., and Vinod, C.K. (2015). Impact of Oxide Thickness on Gate Capacitance, Drain current and Transconductance-A Comprehensive Analysis on MOSFET, Nanowire FET A. Tijjani. et al. / NIPES Journal of Science and Technology Research 2(2) 2020 pp. 212 -227 226 and CNTFET Devices. International Journal for Research in Emerging Science and Technology, vol. 2, no. 6 12, no. 6., 73-85.

[11]Eletski, A.V., & Uspekhi, F.N. (2002). Carbon Nanotubes and their Emission Properties. Russian Academy of Sciences, Physics-Uspekhi 45(4) 369-402.

[12]Alokik, K. (2003). A review of carbon nanotube field effect transistors (version 2.0). www.eng.auburn.edu/ agrawvd/TALKS/nanotube_V.3.1.pdf.

[13]Martel, R., Schmidt, T., Shea, H., Hertel, T., and Avouris, P. (1998). Single and multi wall carbon nanotube field effect transistors. Applied Physics Letters. 73(17), 2447. doi:10.1063/1.122477

[14]Ijiima, S. (1991). Helical microtubules of graphitic carbon. Nature, 354, 56-58.

[15]Hang, S., Maynor, B., Cai, X., and Liu, J. (2003). Ultralong, well-Aligned Single-Welled Carbon nanotube Architectures on surfaces. Advanced Materials, 15, no. 19, 1651-1655.

[16]Alvi, P.A. (2005). Carbon nanotubes field effect transistors: A review. Indian Journal of Pure & Applied physics. 43.

[17]Phaedon, A. ( 2003). β€œ Carbon Nanotube Electronics” Proceedings of the IEEE, Vol 91(11), 230-239.

[18]Zoheir, K and Mohammad, H.S. (2010). β€œFundamental Physical Aspects of Carbon Nanotube Transistors,”Carbon Nanotubes, Jose Mauricio Marulanda (Ed.),

[19]Forro, L. and Schoenberger, C. (2002). β€œPhysical Properties of Multi-wall Nanotubes”, Berlin,Germany: Springer-Verlag Berlin Heidelberg, pp: 329-390.

[20]Rasmita, S., and Mishra, R.R. (2009). β€œSimulations of Carbon Nanotube Field Effect Transistors,” International Journal of Electronic Engineering Research.1(2), 117–125.

[21]Avouris, (2002). Vertical scaling of carbon nanotube field-effect transistors using top gate electrodes. Applied Physics Letters.

[22]Shockley, W., and Pearson, P.L. (1948). Phys. Rev. 74, 232 (1948).

[23]Tans, S.J., Verschueren, A.R.M., and Dekker, C. (1998). Nature 393, 49

[24]Kahng, D., and Atalla, M.M. (1960). Silicon-Silicon Dioxide Field Induced Surface Devices, IRE Solid-State Device Research Conference, Carnegie Institute of Technology, Pittsburgh, PA

[25]Wunnicke, O. (2006). Gate Capacitance of back-gated nanowire field-effect transistor. Applied Physics Letters, 083102.

[26]Vashaee, D., Shakouri, A., Goldberger, J., Kuykendall, T., Pauzauskie, P., and Yang, P.(2006). Electrostatics of nanowire transistors with triangular cross sections. Journal of Applies Physics, 054310.

[27]Natori, K. (1994). Ballistic metal- oxide- semiconductor field effect transistor. Journal of applied Physics. 76 (8), 4881.

[28]Datta, S. (2005). Quantum Transport: Atom to Transistor, Cambridge University Press, Cambridge, England.

[29]Guo, J., Datta, S., and Lundstrom, M. (2004). “A numerical study of scaling issues for Schottky-Barrier carbon nanotube transistors,” IEEE Transactions on Electron Devices, vol. 51, pp. 172-177.

[30]Wang, J., Polizzi, E., & Lundrom, M. (2003). A Computational Study of Ballistic Silicon Nanowire Transistors. IEEE international electron dev. Meeting (IEDM), tech digest, 695-698.